320C25 In-Circuit Emulators

Key Features

  • Plugs directly into the DSP socket
  • Source level debug for the C-25 compiler
  • Memory display and edit while your code is executing
  • Trace display during execution
  • 115 kBaud serial download (64K program downloads in 14 sec.)
  • Real-time transparent emulation up to 50 MHz
  • 32K frames (80 bits) of execution Trace Buffer, with time stamp
  • In-line symbolic assembler and disassembler
  • 64K of overlay Program Memory
  • 64K of overlay Data Memory
  • Unlimited Real-time hardware breakpoints
  • Software breakpoints
  • Complex Events to trigger Breakpoints or Trace logic
  • Two 16-bit Pass Counters
  • 4-level hardware break Sequencer
  • 8 channel user logic state analyzer
  • External trigger input
  • Six trigger outputs
  • Windowing or command driven user interface
  • RS-232 interface to IBM PC
  • Made and supported in U.S.A.

User Interface

The TMS320C25 emulator unit was designed to work with IBM PC computers. The Windows user interface provides these unique features: Pop-up windows for Source, Registers, Program, Data, Trace, Stack, Setup, Symbols, Locals, and variables Watch; source level debugger window for Texas Instruments C-25 compiler; automatic Locals window for C compiler with support for structures and arrays; user defined SFR window; extensive macro support; savable user defined setups that hold Breakpoint, Trace and Event information for easy recall from disk.

Complex Events

A Complex Event is a set of conditions that control the operation of complex program breakpoints and trace start/stop logic in real time. There are three TMS320C25 events available, each consisting of the combination of the following:

    • 64K address breakpoints or ranges;
    • 16-bit data pattern with less than, greater than, equal, not equal, and don’t care combinations ;
    • RD, WR, I/O, instruction fetch, operand read as qualifiers;
    • External input with programmable trigger polarity.

In addition, Complex Events can be counted/delayed by the use of the two 16- bit Pass Counters. An eight level hardware sequencer is available on the TMS320C25 emulator to sequentially trigger the from/to of any Event or Pass Counter.


Breakpoints are used to stop user program execution preserving the current program status. TMS320C25 breakpoints can be triggered from a combination of:

    • Address or Range of Addresses;
    • Complex Events;
    • External Input;
    • Pass Counters;
    • Trace Buffer Full Condition.

Trace Buffer

The TMS320C25 emulator trace buffer is a high speed RAM used to capture in real-time all activity on the microprocessor internal bus and pins. A dedicated start/stop logic allows for filtering unwanted information from the trace buffer. The buffer will remember the selected 32K of samples (frames) comprised of the following:

    • Address Bus;
    • Data Bus;
    • Control Signals;
    • I/O Pins;
    • Real-Time Clock Stamp;
    • User Logic Inputs (8 bits).

Trace can be started/stopped by the combination of:

    • GO Command;
    • Complex Events;
    • Pass Counters;
    • Sequencer;
    • Trace Full Condition.

Additionally, the TMS320C25 emulator trace buffer is equipped with an internal frame counter to allow tracing to stop after a specified number of frames. This feature allows the Trace to catch as much as 32K of the small fragments (snapshots) of executed program at full running speed. The trace contents can be examined during program execution without slowing down the microcontroller.

Specifications (model: USP-25)

  • Supported Microcontrollers
    POD25: TMS320C25
    POD25A: AT&T C25 CORE
    POD26: TMS320C26
    POD29: TMS320C29
  • Maximum emulation speed
    40 MHz-Standard, 50 MHz-Optional
  • Size
    260 mm wide, 260 mm deep, 64 mm high
  • Emulation Program Memory
    64 K Words
  • Emulation Data Memory
    64 K Words
  • Number of Hardware Breakpoints
  • Program Memory Mapping
    256 word boundary
  • Data Memory Mapping
    256 word boundary
  • Pass Counters
    Two, 16-bit each
  • Trace buffer
    32 Kframes ~ 80 bits, with filtering
  • Real_Time Stamp
    32-bits, 100 ns resolution
  • Sequencer
    hardware, 8 levels
  • User probe
    8 channel logic input, 1 trigger input with gate, 6 trigger outputs (Events, Pass Counters, Sequencer)
  • Host interface
    Asynchronous RS-232C, 9600-115KBaud
  • Language support
    Texas Instruments ASM & C, COFF format supported