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In-Circuit Emulators
80186 In-Circuit Emulators

Key Features

  • Memory display/edit while executing in real-time
  • Trace display during execution
  • Real-time transparent emulation up to 26-Mhz
  • Supports all versions of the 80C186 / 80C188 family
  • 3V and 5V target support
  • Transparent emulation- no resources taken away from the 186
  • HLL debug for Microsoft, Borland, and Intel C/C++ compilers
  • 32K frames (80 bits wide) of execution Trace Buffer, with time stamp
  • In-line symbolic assembler and disassembler
  • 1 Mbyte of overlay memory
  • Real-time hardware breakpoints may be used with RAM or EPROM
  • Complex Events to trigger Breakpoints or Trace logic
  • Two 16-bit Pass Counters
  • 8 level hardware break Sequencer
  • 8 channel user logic state analyzer
  • External trigger input and outputs
  • Windowing or command driven user interface
  • IBM PC over parallel or serial interface
  • Remote debugging over TCP/IP network
  • Fast code download (1 MB - 22 sec.)
  • Made and supported in U.S.A.

User Interface

The 80186 emulator Windows user interface is designed to work with the Pentium computers and provides multiple windows for Source, Registers, Memory, Stack, Variables, Locals, Commands, Coverage Analysis, and others. The source level debugger window is capable of working with all major C and C++ compilers and links symbols automatically to the Trace window. The user defined SFR and variable Watch windows complement the suite. Extensive Macro support allows you to add even more power to this already rich and yet intuitive man-machine interface.

Complex Events

Event is a set of conditions that control the operation of complex program breakpoints and trace start/stop logic in real time. There are three 80186 Events available, each consisting of the combination of the following:

  • 1 MB address breakpoints or ranges;
  • 16-bit data pattern with less than, greater than, equal, not equal, and don't care combinations;
  • Memory R/W, I/O R/W, Interrupt, and instruction read as cycle qualifiers;
  • External input with programmable trigger polarity.

In addition, Events can be counted or delayed by the use of two 16-bit Pass Counters. An eight level hardware sequencer of the 80186 emulator is available to sequentially trigger from/to any Event or Pass Counter.

Breakpoints

Breakpoints are used to stop the execution of the 80186 application program preserving the current program status. They can be triggered from a combination of:

  • Address or Range of Addresses;
  • Complex Events;
  • External Input;
  • Pass Counters;
  • Sequencer;
  • Trace Buffer Full Condition.

Trace Buffer

Trace buffer is a high speed RAM used to capture in real-time all activity on the 80186 microprocessor internal bus and pins. A dedicated start/stop logic allows for filtering unwanted information from the trace buffer. Buffer will remember the selected 32K samples (frames) comprised of the following:

  • Address Bus;
  • Data Bus;
  • Control Signals;
  • I/O Pins;
  • Real Time Clock Stamp;
  • User Logic Inputs (8 bits).

The 80186 race can be started/stopped by the combination of:

  • GO Command;
  • Complex Events;
  • Pass Counters;
  • Sequencer;
  • Trace Full Condition.

Additionally, the 80186 emulator's trace buffer of is equipped with a special internal counter to allow tracing to stop after a specified number of frames. This feature allows Trace to catch as much as 32K of small fragments (snapshots) of executed program at full running speed. The trace contents can be examined during program execution without slowing down the microcontroller.

Specifications

  • Supported Microcontrollers
    POD186: 80C186, 80C188
    POD186EA: 80C186EA, 80C188EA
    POD186EB: 80C186EB, 80C188EB
    POD186EC: 80C186EC, 80C188EC
    POD186XL: 80C186XL, 80C188XL, 80L186XL, 80L188XL
  • Maximum emulation speed
    Up to 20 MHz - standard, 26 MHz - optional l
  • Size
    260 mm wide, 260 mm deep, 64 mm high
  • Emulation Program Memory
    1 MB
  • Number of Hardware Breakpoints
    Unlimited
  • Program Memory Mapping
    256 byte boundary
  • Write Protect Mapping
    256 byte boundary
  • Pass Counters
    two, 16-bit each
  • Trace buffer
    32K * 80 bits, pre- and post-filtering
  • Real Time Stamp
    32-bits, 100 ns resoultion
  • Sequencer
    8 level hardware
  • User probe
    8 channel logic input
    1 trigger input with gate
    6 trigger outputs (Events, Pass Counters, Sequencer)
  • Host interface
    Asynchronous RS-232C, 9600-115KBaud, XON/XOFF support
  • Language support
    C and C++ from Microsoft, Borland, Intel and others

Data Sheet